Design and Analysis of Comparator Using Different Logic Style of Full Adder

In digital system the comparator is a very useful and basic arithmetic component. A compact, good cost benefit, high-performance ratio and LOW POWER comparator plays an important role in almost all hardware sorters. The basic function of a high-gain comparator is to determine whether an input voltage is higher or lower than a reference voltage—and to present that decision as one of two voltage levels, established by the output’s limiting values. Comparators have a variety of uses, including: polarity identification, 1-bit analog-to-digital conversion, switch driving, square/triangular-wave generation, and pulse-edge generation. HERE a new design of comparator is described with the help of Full adder which are the basic building block of ALU and ALU is a basic functioning unit of the microprocessors and DSP. The objective of this paper is to provide small area, low power comparator for very large scale integration designers. in this paper a small power dissipation and less area over conventional 2 bit comparator is proposed and using this comparator a new style 16-bit comparator is proposed. Comparison between different designs is calculated by simulation that is performed at 0.12um technology in EDA Tool.